Broadcom BCM5722 - Table 158: Uncorrectable Error Severity Register (Offset 0 X10 C)

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R PCIe-Enhanced Capabilities Page 226
UNCORRECTABLE ERROR SEVERITY REGISTER (OFFSET 0X10C)
Table 158: Uncorrectable Error Severity Register (Offset 0x10C)
Bit Field Description Init Access
31:21 Reserved – 0 RO
20 Unsupported Request
Error Severity
This bit controls the severity when an Unsupported Request Error
occurs.
• 0 = Non-fatal
• 1 = Fatal
0R/W
19 ECRC Error Status This bit controls the severity when an ECRC error occurs.
• 0 = Non-fatal
• 1 = Fatal
0R/W
18 Malformed TLP Status This bit controls the severity when a Malformed TLP error occurs.
• 0 = Non-fatal
• 1 = Fatal
1W2C
17 Receiver Overflow
Status
This bit controls the severity when a Receiver Overflow error
occurs.
• 0 = Non-fatal
• 1 = Fatal
1R/W
16 Unexpected
Completion Status
This bit controls the severity when an Unexpected Completion
error occurs.
• 0 = Non-fatal
• 1 = Fatal
0R/W
15 Completer Abort Status This bit controls the severity when a Completer Abort error occurs.
• 0 = Non-fatal
• 1 = Fatal
0R/W
14 Completion Timeout
Status
This bit controls the severity when a Completion Timeout error
occurs.
• 0 = Non-fatal
• 1 = Fatal
0R/W
13 Flow Control Protocol
Error Status
This bit controls the severity when a Flow Control Protocol error
occurs.
• 0 = Non-fatal
• 1 = Fatal
1R/W
12 Poisoned TLP Status This bit controls the severity when a Poisoned TLP error occurs.
• 0 = Non-fatal
• 1 = Fatal
0R/W
11:5 Reserved – 0 RO
4 Data Link Protocol
Error Status
This bit controls the severity when a Data Link Protocol error
occurs.
• 0 = Non-fatal
• 1 = Fatal
1R/W
3:1 Reserved – 0 RO
0 Training Error Status This bit controls the severity when a Training error occurs.
• 0 = Non-fatal
• 1 = Fatal
1R/W