Broadcom BCM5722 - Figure 18: Media Independent Interface

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R PHY Control Page 36
When wire speed mode is enabled, the HCD can be determined from MII register 19h, bits 10:8, since not all of MII register 4
advertised abilities may be sent to the Link Partner when downgrade is active, as shown by a 1 in bit 14 of MII register 11h.
PHY CONTROL
The BCM5722 Ethernet controller supports the following physical layer interfaces:
• The MII is used in conjunction with 10-/100-Mbps copper Ethernet transceivers.
• GMII supports 1000 Mbps copper Ethernet transceivers.
MII BLOCK
The MII interconnects the MAC and PHY sublayers (see the following figure).
Figure 18: Media Independent Interface
RX
I/O
RXD /4
RX_CLK1
RX_ER
RX_DV
TX
I/O
TXD /4
MII_TXCLK
TX_ER
TX_EN
Media
Status
I/O
COL
CRS
LNKRDY
RX Media
Access
Mgmnt
RX
MAC
Rx Data
Decapsulation
TX
Media
Access
Mgmnt
TX
MAC
Tx Data
Encapsulation
MAC Sublayer
Physical Layer
RX
I/O
Symbol
Decoder
TX
I/O
Symbol
Encoder
4-bit Data Path
2.5 MHz at 10 Mbps
25 MHz at 100 Mbps
4-bit Data Path
LED
Control
LED
I/O
2.5 MHz at 10 Mbps
25 MHz at 100 Mbps
MII