BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 499 Transceiver Registers (BCM5906/BCM5906M) Document 5722-PG101-R
Auxiliary Status Summary Register
The Auxiliary Status Summary register contains copies of redundant status bits found elsewhere within the MII register
space.
Descriptions for each of these individual bits can be found associated with the primary register descriptions.
Table 552: Auxiliary Status Summary Register (Address 25d, 19h)
Bit Name R/W Description Default
15 Auto-Negotiation Complete RO 1 = Auto-negotiation process completed 0
14 Auto-Negotiation Complete
Acknowledge
RO
LH
1 = Auto-negotiation completed acknowledge state 0
13 Auto-Negotiation Acknowledge
Detected
RO
LH
1 = Auto-negotiation acknowledge detected 0
12 Auto-Negotiation Ability Detect RO
LH
1 = Auto-negotiation for link partner ability 0
11 Auto-Negotiation Pause RO PHY and link partner pause operation bit set 0
10:8 Auto-Negotiation HCD RO 000 = No highest common denominator
001 = 10BASE-T 010 = 10BASE-T full-duplex
011 = 100BASE-TX
100 = 100BASE-T4
101 = 100BASE-TX full-duplex 11x = undefined
000
7 Auto-Negotiation Parallel
Detection Fault
RO
LH
1 = Parallel Detection fault 0
6 Reserved - - 0
5 Link Partner Page Received RO 1 = New page has been received. 0
4 Link Partner Auto-Negotiation
Able
RO 1 = Link partner is auto-negotiation capable 0
3 Speed Indicator RO 1 = 100 Mbps 0 = 10 Mbps 0
2Link Status RO
LL
1 = Link is up (link pass state) 0
1 Auto-Negotiation Enabled RO 1 = Auto-negotiation enabled 0
0 Full Duplex Indication RO
LL
1 = Full-duplex active
0 = Full-duplex inactive
0
R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read
operation. Use default values of reserved bit(s) when writing to reserved bit(s).
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