Broadcom BCM5722 - Table 245: Send BD Ring Selector Control Registers; Table 246: Send BD Ring Selector Mode Register (Offset 0 X1400); Table 247: Send BD Ring Selector Status Register (Offset 0 X1404)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 277 Send BD Ring Selector Control Registers Document 5722-PG101-R
SEND BD RING SELECTOR CONTROL REGISTERS
The following registers may be used by software for debug and diagnostic purposes. For example, Host software could
compare the Send BD Consumer Index located in the Status block (see “Status Block” on page 53) to the registers located
in this region.
SEND BD RING SELECTOR MODE REGISTER (OFFSET 0X1400)
SEND BD RING SELECTOR STATUS REGISTER (OFFSET 0X1404)
Table 245: Send BD Ring Selector Control Registers
Offset Registers
0x1400–0x1403 Send BD Ring Selector Mode
0x1404–0x1407 Send BD Ring Selector Status
0x1408–0x140b Send BD Ring Selector Hardware Diagnostics
0x140c–0x143f Reserved
0x1440–0x1443 Send BD Diagnostic Ring Selector Local NIC Send BD Consumer Index
0x1444–0x17ff Reserved
Table 246: Send BD Ring Selector Mode Register (Offset 0x1400)
Bit Field Description Init Access
31:3 Reserved – 0 RO
2 Attn_Enable When this bit is set to 1, an internal attention is generated
when an error occurs.
R/W
1 Enable This bit controls whether the Send BD Ring Selector state
machine is active or not. When set to 0, it completes the
current operation and cleanly halts. Until it is completely
halted, it remains 1 when read.
R/W
0 Reset When this bit is set to 1, the Send BD Ring Selector state
machine is reset. This is a self-clearing bit.
R/W
Table 247: Send BD Ring Selector Status Register (Offset 0x1404)
Bit Field Description Init Access
31:3 Reserved – 0 RO
2 Error Send BD Ring Selector error status. RO
1:0 Reserved – 0 RO