Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R PCIe Capabilities Page 218
DEVICE STATUS REGISTER (OFFSET 0XDA)
2 Fatal Error Reporting
Enabled
When this bit is set, Fatal Error reporting is enabled. 0 R/W
1 Non-fatal Error
Reporting Enable
When this bit is set, Non-fatal Error reporting is
enabled.
0R/W
0 Correctable Error
Reporting Enable
When this bit is set, Correctable Error reporting is
enabled.
0R/W
a. The host software should not set this field above the MPS-supported value of the device as advertised in bits 0–2 of register
offset 0xD4.
Table 146: Device Status Register (Offset 0xDA)
Bit Field Description Init Access
15:6 Reserved – 0 R/W
5 Transaction Pending When this bit is set to 1, it indicates that this device has
issued non-posted request packets which have not been
completed.
0RO
4 Aux Power Detected When this bit is set, it indicates that Aux power has been
detected.
RO
3 Unsupported Request
Detected
When this bit is set to 1, it indicates that an Unsupported
Request has been received.
0W2C
2 Fatal Error Detected When this bit is set to 1, it indicates that a Fatal Error has
been detected.
0W2C
1 Non-fatal Error
Detected
When this bit is set to 1, it indicates that a Non-fatal Error
has been detected.
0W2C
0 Correctable Error
Detected
When this bit is set to 1, it indicates that a Correctable Error
has been detected.
0W2C
Table 145: Device Control Register (Offset 0xD8) (Cont.)
Bit Field Description Init Access
To Next Page
Loading...