Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Page xix
Host Coalescing Control Registers........................................................................................................ 292
Host Coalescing Mode Register (Offset 0x3C00)............................................................................... 294
Host Coalescing Status Register (Offset 0x3C04).............................................................................. 295
Receive Coalescing Ticks Registers (Offset 0x3C08) ........................................................................ 295
Send Coalescing Ticks Register (Offset 0x3C0C) .............................................................................. 295
Receive Max Coalesced BD Count (Offset 0x3C10) .......................................................................... 296
Send Max Coalesced BD Count (Offset 0x3C14)............................................................................... 296
Receive Max Coalesced BD Count During Interrupt (Offset 0x3C20) ................................................ 297
Send Max Coalesced BD Count During Interrupt (Offset 0x3C24)..................................................... 297
Status Block Host Address Register (Offset 0x3C38)......................................................................... 297
Status Block Base Address Register (Offset 0x3C44)........................................................................ 297
Flow Attention Register (Offset 0x3C48) ............................................................................................ 297
NIC Receive BD Consumer Index Register (Offset 0x3C54–0x3C57) ............................................... 298
NIC Diagnostic Return Rings Producer Index Registers 1–4 (Offset 0x3C80–0x3C8F)—BCM5722,
BCM5755, BCM5755M, BCM5756M, BCM5757, BCM5754, BCM5787 Only.................................... 298
NIC Diagnostic Return Rings Producer Index Register (Offset 0x3C80–0x3C83)—BCM5906 Only.. 299
NIC Diagnostic Send BD Consumer Index Register (Offset 0x3CC0–0x3CC3)................................. 300
Memory Arbiter Registers ....................................................................................................................... 301
Memory Arbiter Mode Register (Offset 0x4000) ................................................................................. 301
Memory Arbiter Status Register (Offset 0x4004)—BCM5722, BCM5755, BCM5755M, BCM5756M,
BCM5757, BCM5754, BCM5787 Only................................................................................................ 303
Memory Arbiter Trap Address Low Register (Offset 0x4008)—BCM5722, BCM5755, BCM5755M,
BCM5756M, BCM5757, BCM5754, BCM5787 Only........................................................................... 303
Memory Arbiter Trap Address High Register (Offset 0x400C)—BCM5722, BCM5755, BCM5755M,
BCM5756M, BCM5757, BCM5754, BCM5787 Only........................................................................... 304
Buffer Manager Control Registers.......................................................................................................... 305
Buffer Manager Mode Register (Offset 0x4400)................................................................................. 306
MBUF Pool Base Address Register (Offset 0x4408).......................................................................... 307
MBUF Pool Length Register (Offset 0x440C)..................................................................................... 307
Read DMA MBUF Low Watermark Register (Offset 0x4410)............................................................. 307
MAC RX MBUF Low Watermark Register (Offset 0x4414)................................................................. 308
MBUF High Watermark Register (Offset 0x4418)............................................................................... 308
RX RISC MBUF Cluster Allocation Request Register (Offset 0x441C) .............................................. 308
RX RISC MBUF Allocation Response Register (Offset 0x4420) ........................................................ 309
BM Hardware Diagnostic 1 Register (Offset 0x444C)......................................................................... 309
BM Hardware Diagnostic 2 Register (Offset 0x4450)......................................................................... 309
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