Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Transceiver Registers (BCM5906/BCM5906M) Page 486
MII Status Register
100BASE-T4 Capability
The PHY core is not capable of 100BASE-T4 operation and returns a 0 when bit 15 of the Status register is read.
100BASE-TX FDX Capability
The PHY core is capable of 100BASE-TX full-duplex operation and returns a 1 when bit 14 of the Status register is read.
100BASE-TX Capability
The PHY core is capable of 100BASE-TX half-duplex operation and returns a 1 when bit 13 of the Status Register is read.
10BASE-T FDX Capability
The PHY core is capable of 10BASE-T full-duplex operation and returns a 1 when bit 12 of the Status register is read.
10BASE-T Capability
The PHY core is capable of 10BASE-T half-duplex operation and returns a 1 when bit 11 of the Status Register is read.
MF Preamble Suppression
This bit is the only writable bit in the Status register. Setting this bit to a 1 allows subsequent MII management frames to be
accepted with or without the standard preamble pattern. When preamble suppression is enabled, only 2 preamble bits are
required between successive management commands, instead of the normal 32.
Table 539: MII Status Register (Address 01d, 01h)
Bit Name R/W Description Default
15 100BASE-T4 Capability RO 0 = Not 100BASE-T4 capable 0
14 100BASE-TX FDX Capability RO 1 = 100BASE-TX full-duplex capable 1
13 100BASE-TX Capability RO 1 = 100BASE-TX half-duplex capable 1
12 10BASE-T FDX Capability RO 1 = 10BASE-T full-duplex capable 1
11 10BASE-T Capability RO 1 = 10BASE-T half-duplex capable 1
10:7 RESERVED – – 0000
6 MF Preamble Suppression R/W 1= Preamble may be suppressed
0 = Preamble always required
0
5 Auto-Negotiation Complete RO 1 = Auto-negotiation process completed
0 = Auto-negotiation process not
completed
0
4 Reserved RO Ignore when read 0
3 Auto-Negotiation Capability RO 1 = Auto-negotiation capable
0 = Not auto-negotiation capable
1
2Link Status RO
LL
1 = Link is up (link pass state)
0 = Link is down (link fail state)
0
1 Jabber Detect RO
LH
1 = Jabber condition detected
0 = No jabber condition detected
0
0 Extended Capability RO 1 = Extended register capable 1
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