BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 485 Transceiver Registers (BCM5906/BCM5906M) Document 5722-PG101-R
Auto-Negotiation Enable
Auto-negotiation can be disabled either by hardware or software control. If the ANEN input pin is driven to logic 0, auto-
negotiation is disabled by hardware control. If bit 12 of the Control Register is written with a value of 0, auto-negotiation is
disabled by software control. When auto-negotiation is disabled in this manner, writing a 1 to the same bit of the Control
Register or resetting the chip re-enables auto-negotiation. Writing to this bit has no effect when auto-negotiation has been
disabled by hardware control. When read, this bit returns the value most recently written to this location, or 1 if it has not
been written since the last chip reset.
Power Down
The PHY core does not have a low power mode.
Isolate
Each individual PHY is isolated from its Media Independent Interface by writing a 1 to bit 10 of the Control Register. All
RXD0{n} outputs are tri-stated and all TXD0{n} inputs are ignored. Since the MII management interface is still active, the
isolate mode is cleared by writing a 0 to bit 10 of the control register, or by resetting the chip. When this bit is read, it returns
a 1 when the chip is in isolate mode, otherwise it returns a 0.
Restart Auto-Negotiation
Bit 9 of the Control Register is a self-clearing bit that allows the auto-negotiation process to be restarted, regardless of the
current status of the auto-negotiation state machine. In order for this bit to have an effect, auto-negotiation must be enabled.
Writing a 1 to this bit restarts the auto-negotiation, while writing a 0 to this bit has no effect. Since the bit is self-clearing after
only a few cycles, it always returns a 0 when read. The operation of this bit is identical to bit 9 of the Auxiliary Multiple PHY
Register.
Duplex Mode
By default, the PHY core powers up in half-duplex mode. The chip can be forced into full-duplex mode by writing a 1 to bit
8 of the Control Register while auto-negotiation is disabled. Half-duplex mode can be resumed by writing a 0 to bit 8 of the
Control Register, or by resetting the chip.
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