Broadcom BCM5722 - Figure 9: DMA Read Engine

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 25 DMA Read Document 5722-PG101-R
DMA READ
READ ENGINE
The DMA read engine (see Figure 9) activates whenever a host read is initiated by the send or receive data paths.
Figure 9: DMA Read Engine
The DMA read engine de-queues an internal data structure/request and performs the following functions:
• DMAs the data from the host memory to an internal Read DMA FIFO
• Moves the data from the Read DMA FIFO to NIC internal memory
• Classifies the frame
• Performs checksum calculations
• Copies the VLAN tag field from the DMA descriptor to the frame header
READ FIFO
The read FIFO provides elasticity during data movement from host memory to device local memory. The memory arbiter is
a gatekeeper for multiple internal blocks; several portions of the architecture may simultaneously request internal memory.
The PCI read FIFO provides a small buffer for the data read from host memory while the Read DMA engine requests internal
memory via the memory arbiter. The data is moved out of the read DMA FIFO into device local memory once a memory data
path is available. The FIFO isolates the PCI clock domain from the device clock domain. This reduces latency internally and
externally on the PCI bus. The PCIe Read DMA FIFO of BCM5755, BCM5755M, BCM5787, BCM5787M, BCM5754, and
BCM5754M devices holds 1024 bytes. The operation of the read DMA FIFO is transparent to host software.The Read DMA
engine makes sure there is enough space in internal Tx Packet Buffer Memory before initiating a DMA request for transfer
of Tx packet data from host memory to device internal packet memory.
BUFFER MANAGER
The buffer manager maintains pools of internal memory used by transmit and receive engines. The buffer manager has logic
blocks for allocation, free, control, and initialization of internal memory pools. The DMA read engine requests internal
memory for BDs and frame data. Figure 9 on page 25 shows the transmit data path using the DMA Read Engine. The read
DMA engine also fetches Rx BDs for the receive data path.
text
text
DMA
BD Packet#1
Host Send Buffer
Descriptors
Packet Data #1
Host Send Buffer
Memory
Buffer Manager
BD Packet#1
Frame Classify &
Checksum
Calculation
text
Packet Data #1
Frame Header #1
NIC BD
Memory
NIC Buffer
Memory
Tx
FIFO
Frame
Mod
TX
MAC
Statistics
TX
PCS
TX
RMII
TX
GMII
TX
IO
6416
Read
FIFO