BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 129 Configuration Space Document 5722-PG101-R
MEMORY MAPPED I/O REGISTERS
The following BCM5722 Ethernet controller registers are used in the mode configuration of the PCI memory-mapped I/O.
PCI Command Register
The PCI_Command register is 16-bits wide (see Figure 50). The BCM5722 Ethernet controller does not have I/O mapped I/
O. The I/O_Space bit is de-asserted by hardware. The BCM5722 Ethernet controller does support
Memory_Mapped_Memory and hardware will assert the Memory_Space bit. Both these bits are read-only and are usually
read by the PnP BIOS/OS. The BIOS/OS examines these bits to assign non-conflicting resources to PCI devices.
Figure 50: PCI Command Register
PCI State Register
The PCI_State register is 32-bits wide. Operating mode is set with the Flat_View bit in the PCI_State register. When the
Flat_View bit is asserted, the BCM5722 Ethernet controller decodes a 32M of block host memory. When the Flat_View bit
is de-asserted, the BCM5722 Ethernet controller decodes a 64K block of host memory.
Mem I/O
I/O Space
Read Only
Always = 0
[0]
Bus
Mast
Spec
Cycle
Write
Invld
VGA
Snoop
Parity
Error
Step
Ctrl
Sys
Err
Fast
Back 2
Back
Rsvd
[1][2][3][7] [6] [5] [4][9] [8][15:10]
Memory Space
Read/Write
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