Broadcom BCM5722 - Table 438: TLP Status Register (Offset 0 X7 C60); Table 439: Data Link Control Register (Offset 0 X7 D00)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 395 PCIe Registers Document 5722-PG101-R
TLP DEBUG REGISTER (OFFSET 0X7C6C)
DATA LINK CONTROL REGISTER (OFFSET 0X7D00)
This register is reset only by POR.
Note: This register is not applicable to the BCM5906 device.
Table 438: TLP Status Register (Offset 0x7C60)
Bit Field Description Init Access
31 A4 Device Indication Bit Indicates whether the device is A4 chip 1 for A4,
0 for other
versions
RO
30 B1 Device Indication Bit Indicates whether the device is B1 chip 1 for B1,
0 for other
versions.
RO
29:0 Reserved 0RO
Table 439: Data Link Control Register (Offset 0x7D00)
Bit Field Description Init Access
31:28 Reserved Write as 0, ignore when read. 0 –
27 CQ26554 disable bit
(BCM5906 /
BCM5906M A2 and
later only)
1: Disable fix in dma_cmplt sm for CQ26554
0: Enable fix in dma_cmplt sm for CQ26554.
0RW
Reserved (all others) Write as 0, ignore when read –
26:25 Reserved Write as 0, ignore when read 0 –
24 PME Turn Off Message
Handling Fix CQ11211
Set this bit to 1 to enable the fix. 0 R/W
23 Enable Data Link Layer
Retry Logic Fix
CQ11121
Set to 1 to enable the fix. 1 R/W
22 Power Mgmt State
Machine L0s Lockup
Fix CQ11080
Enable fix to transition out of L0s when link experiencing
recovery.
• 1 = Disable fix
• 0 = Enable fix
0R/W
21 Enable Flow Control
Credit Checking Fix
CQ10674
Enable this bit to check MPS or actually advertised credit.
• 1 = Disable fix
• 0 = Enable fix
0R/W
20 Enable L1 to L0
Transition when Device
is Configured to D3 Hot
CQ10453
Enable this fix to transition back to L1 after waked up and
D state is set at D3 state:
• 1 = Disable fix
• 0 = Enable fix
0R/W