Broadcom BCM5722 - Table 551: Auxiliary Control;Status Register (Address 24 D, 18 H)

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 497 Transceiver Registers (BCM5906/BCM5906M) Document 5722-PG101-R
Auxiliary Control/Status Register
Jabber Disable
10BASE-T operation only. Bit 15 of the Auxiliary Control register allows the user to disable the Jabber Detect function,
defined in the IEEE standard. This function shuts off the transmitter when a transmission request has exceeded a maximum
time limit. By writing a 1 to bit 15 of the Auxiliary Control Register, the Jabber Detect function is disabled. Writing a 0 to this
bit or resetting the chip restores normal operation. Reading this bit returns the value of Jabber Detect Disable.
Link Disable
Writing a 1 to bit 14 of the Auxiliary Control register allows the user to disable the Link Integrity state machines, and place
the PHY core into forced link pass status. Writing a 0 to this bit or resetting the chip restores the Link Integrity functions.
Reading this bit returns the value of Link Integrity Disable.
Table 551: Auxiliary Control/Status Register (Address 24d, 18h)
Bit Name R/W Description Default
15 Jabber Disable R/W 1 = Jabber function disabled in PHY
0 = Jabber function enabled in PHY
0
14 Link Disable R/W 1 = Link integrity test disabled in PHY
0 = Link integrity test is enabled in PHY
0
13:8 Reserved - - 000000
7:6 HSQ: LSQ R/W These two bits define the squelch mode of the 10BASE-T
carrier sense mechanism:
00 = normal squelch
01 = low squelch
10 = high squelch
11 = not allowed
00
5:4 Edge Rate [1:0] R/W 00 = 1 nanoseconds
01 = 2 nanoseconds
10 = 3 nanoseconds
11 = 4 nanoseconds
11
3 Auto-Negotiation
Indicator
RO 1 = Auto-negotiation activated
0 = Speed forced manually
1
2 Force 100/10 Indication RO 1 = Speed forced to 100BASE-X
0 = Speed forced to 10BASE-T
1
1 Speed Indication RO 1 = 100BASE-X
0 = 10BASE-T
0
0 Full-Duplex Indication RO 1 = Full-duplex active
0 = Full-duplex not active
0
R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read
operation. Use default values of reserved bit(s) when writing to reserved bit(s).