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BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 117 Configuration Space Document 5722-PG101-R
UNDI Mailbox Access
The UNDI mailboxes are shadows of BCM5722 Ethernet controller mailbox registers. All mailboxes reside in the BCM5722
Ethernet controller register block, not memory block. Unlike register and memory indirect access, the UNDI Mailboxes
shadows are mapped 1:1 to a BCM5722 Ethernet controller register; these shadow registers do not have an address
register.
The UNDI_RX_BD_Standard_Ring_Producer_Index_Mailbox register shadows a mailbox located at offset 0x5868 (see
“Receive BD Standard Producer Ring Index Register (Offset 0x5868–0x586F)” on page 325), in the BCM5722 Ethernet
controller register block. Any index update (write) to the UNDI_RX_BD_Standard_Ring_Producer_Index_Mailbox will
advance the standard producer ring index; software signals hardware that an RX buffer descriptor is available.
The UNDI_RX_BD_Return_Ring_Consumer_Index_Mailbox register corresponds to a mailbox located at offset 0x5880
(see “Receive BD Return Ring 1 Consumer Index Register (Offset 0x5880–0x5887)” on page 325). A update (write) to
this register indicates that host software has consumed a RX buffer descriptor(s); return rings contain filled Enet frames,
from the receive MAC.
Finally, the UNDI_TX_BD_Host_Producer_Mailbox register maps to register offset 0x5900 () in the BCM5722 Ethernet
controller register block. Host software writes to this register when Ethernet frame(s) are ready to be transmitted. Host
software writes the index of buffer descriptor, which is ready for transmission.
Notice that all these UNDI shadows are the first or primary ring and not all the rings are shadowed into PCI configuration
space. For example, Receive Return rings 2–16 do not have shadow registers. UNDI drivers only require a minimal set of
registers to provide basic network connectivity. Functionality is the most important consideration. Fifteen additional receive
return rings would extend the size of the Device Specific portion of the PCI Configuration Space registers.
The UNDI shadow registers alias three registers in the BCM5722 Ethernet controller register block (see Figure 43
on page 118).

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