Broadcom BCM5722 - Page 2

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REVISION HISTORY
Revision Date Change Description
5722-PG101-R 10/15/07 Updated:
• Added BCM5786 chip to Table 2: “Family Features,” on page 6
• Table 3: “Family Revision Levels,” on page 8
• Section 4: “NVRAM Configuration” on page 41
• Table 171: “Device Serial No Lower DW Register (Offset
0x164),” on page 230
• Table 172: “Device Serial No Upper DW Register (Offset
0x168),” on page 231
• “Regulator Voltage Control Register (Offset 0x590)” on page 260
• Added BCM5787 part to “Serial EEPROM Address Register (Offset
0x6838)” on page 340 and “Serial EEPROM Data Register (Offset
0x683C)” on page 341
• Bits 9:4 in Table 481: “PHY Identifier Registers (PHY_Addr = 0x1,
Reg_Address 03h),” on page 418
Added:
• Table 19: “Status Block Format for BCM5755 and BCM5755M
Devices,” on page 54
• Table 20: “Status Word Flags,” on page 54
Removed:
• “NVRAM Control”
5722-PG100-R 03/20/07 Added:
• BCM5722
Updated:
• Table 2: “Family Features,” on page 6
• Table 53: “Flag Fields for a Ring,” on page 87
• Table 146: “Subsystem ID Register (Offset 0x2E),” on page 238
• “Receive MAC Mode Register (Offset 0x468)” on page 301
• “Miscellaneous Configuration Register (Offset 0x6804)” on page 384