Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Broadcom Vendor-Specific Capabilities Page 208
18 LED polarity When set to 1, changes the polarity of the 4 LEDs 0 R/W
17 BIST function control Controls the BIST function 0 R/W
16 Asynchronous BIST Reset Resets the BIST 0 R/W
15 Register BIST select bit
(BCM5906 only)
0: Selects EMAC TX_FIFO and WDMA FIFO
1: Selects EMAC RX_FIFO and RDMA FIFO
0 R/W
Reserved (BCM5722,
BCM5755, BCM5755M,
BCM5756M, BCM5757,
BCM5754, BCM5787 only)
–
14 Reserved – 0 R/W
13 Select Alt Clock Source
(BCM5722, BCM5755,
BCM5755M, BCM5756M,
BCM5757, BCM5754,
BCM5787 only)
0: Alternate clock source = ck25 = (XTAL_IN)/2
1: Then alternate clock source = ck25 = MII_CLK/2
0 R/W
Reserved (BCM5906 only) –
12 Select Alt Clock (BCM5722,
BCM5755, BCM5755M,
BCM5756M, BCM5757,
BCM5754, BCM5787 only)
Uses the alternate clock as the clock reference for the
internal clocks, rather than the 62.5 MHz. In BCM5752,
this bit has no effect when TPM is enabled.
0 R/W
Reserved (BCM5906 only)
11:10 Reserved
9 Core Clock Disable (BCM5722,
BCM5755, BCM5755M,
BCM5756M, BCM5757,
BCM5754, BCM5787 only)
Disable the CORE CLK to all blocks. 0 R/W
Reserved (BCM5906 only) Do not write to this bit in any conditions.
8 Reserved
7 M66EN N/A for PCIe Device.
6:5 Reserved
4:0 Detected PCI Clock Speed N/A for PCIe Device.
Table 129: PCI Clock Control Register (Cont.)
Bit Description Description Init Access
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