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Programmer’s Guide BCM5722

10/15/07

Broadcom Corporation

Document 5722-PG101-R PCIe Registers Page 382

TLP Diagnostic Registers (these are Transaction Layer Protocol Hardware Debug Registers)—

BCM5906, BCM5906M only

0x7C00 TLP Control register

0x7C04 TLP Workaround Register

0x7C08:0x7CFF Reserved

Data Link Layer Internal Registers

0x7D00 Data Link Control register

0x7D04 Data Link Status register

0x7D08 Data Link Attention register

0x7D0C Data Link Attention Mask register

0x7D10 Next Transmit Sequence Number Debug register

0x7D14 Acked Transmit Sequence Number Debug register

0x7D18 Purged Transmit Sequence Number Debug register

0x7D1C Receive Sequence Number Debug register

0x7D20 Data Link Replay register

0x7D24 Data Link ACK Timeout register

0x7D28 Power Management Threshold register

0x7D2C Retry Buffer Write Pointer Debug register

0x7D30 Retry Buffer Read Pointer Debug register

0x7D34 Retry Buffer Purged Pointer Debug register

0x7D38 Retry Buffer Read/Write Debug Port

0x7D3C Error Count Threshold register

0x7D40 TLP Error Counter register

0x7D44 DLLP Error Counter

0x7D48 NAK Received Counter

0x7D4C Data Link Test register

0x7D50 Packet BIST register

0x7D54 Link PCIe 1.1 Control Register

0x7D58–0x7dff Reserved

PHY Internal Registers

0x7E00 PHY Mode register

0x7E04 PHY/Link Status register

0x7E08 PHY/Link LTSSM Control register

0x7E0C PHY/Link Training Link Number

0x7E10 PHY/Link Training Lane Number

0x7E14 PHY/Link Training N_FTS

0x7E18 PHY Attention Register

0x7E1C PHY Attention Mask register

Table 412: PCIe Registers (Cont.)

Address Description

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