Broadcom BCM5722 - Page 46

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page xlvi Document 5722-PG101-R
BCM5754, BCM5787 Only ..............................................................................................................241
Table 189: Ethernet MAC Control Registers—BCM5906 Only.......................................................................243
Table 190: Ethernet MAC Mode Register (Offset 0x400) ...............................................................................245
Table 191: Ethernet MAC Status Register (Offset 0x404) ..............................................................................246
Table 192: Ethernet MAC Event Enable Register (Offset 0x408)...................................................................247
Table 193: LED Control Register (Offset 0x40C)............................................................................................247
Table 194: Ethernet MAC Address High Register (Offset 0x410)...................................................................249
Table 195: Ethernet MAC Address Low Register (Offset 0x414)....................................................................249
Table 196: WOL Pattern Pointer Register (Offset 0x430)...............................................................................249
Table 197: WOL Pattern Configuration Register (Offset 0x434).....................................................................250
Table 198: Ethernet Transmit Random Backup Register (Offset 0x438)........................................................250
Table 199: Receive MTU Size Register (Offset 0x43C)..................................................................................250
Table 200: MI Communication Register (Offset 0x44C) .................................................................................251
Table 201: MI Status Register (Offset 0x450).................................................................................................251
Table 202: MI Mode Register (Offset 0x454)..................................................................................................252
Table 203: Autopolling Status Register (Offset 0x458)...................................................................................252
Table 204: Transmit MAC Mode Register (Offset 0x45C) ..............................................................................253
Table 205: Transmit MAC Status Register (Offset 0x460)..............................................................................253
Table 206: Transmit MAC Lengths Register (Offset 0x464)...........................................................................254
Table 207: Receive MAC Mode Register (Offset 0x468)................................................................................254
Table 208: Receive MAC Status Register (Offset 0x46C) ..............................................................................256
Table 209: MAC Hash Register 0–3 (Offset 0x470) .......................................................................................256
Table 210: Receive Rules Control Register (Offset 0x480)............................................................................257
Table 211: Receive Rules Value/Mask Register (Offset 0x484).....................................................................258
Table 212: Receive Rules Configuration Register (Offset 0x500) ..................................................................258
Table 213: Low Watermark Maximum Receive Frames Register (Offset 0x504)...........................................258
Table 214: Ethernet Type Matching Value Register (Offset 0X510)...............................................................259
Table 215: Protocol ID Offset Register (Offset 0x514) ...................................................................................259
Table 216: Regulator Voltage Control Register (Offset 0x590) ......................................................................260
Table 217: Indirection Table Register 0 (Offset: 0x630) .................................................................................261
Table 218: Indirection Table Register 15 (Offset: 0x66C)...............................................................................262
Table 219: Hash Key Register 0 (Offset: 0x670) ............................................................................................262
Table 220: Hash Key Register 9 (Offset: 0x694) ............................................................................................263
Table 221: Receive MAC Programmable IPv6 Extension Header Register (0x6A0)......................................263