BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 429 Transceiver Registers Document 5722-PG101-R
7 Bypass Receive
Symbol Alignment
100BASE-TX receive symbols alignment can be bypassed by
writing a 1 to bit 7.
• 1 = 5B receive symbols not aligned.
• 0 = Receive symbols aligned to 5B boundaries.
0R/W
6 Reset Scrambler When bit 6 of the PHY Extended Control Register is written to
1, the BCM5722 Ethernet controller resets the scrambler to an
all 1s state. This bit is self-clearing, and always returns 0 when
read.
• 1 = Reset scrambler to all 1s state.
• 0 = Normal scrambler operation.
0R/W
SC
5 Enable LED Traffic
Mode
When bit 5 of the PHY Extended Control Register is written to
1, the BCM5722 Ethernet controller enables the LED traffic
mode. When bit 5 is written to 0, the BCM5722 Ethernet
controller disables the LED traffic mode. In this mode, the traffic
LED will blink faster with a higher rate of traffic, and will stay on
during heavy traffic.
• 1 = LED traffic mode enabled.
• 0 = LED traffic mode disabled.
0R/W
4 Force LEDs ON When bit 4 of the PHY Extended Control Register is written to
1, the BCM5722 Ethernet controller forces all LEDs into the ON
state. When bit 4 is written to 0, the BCM5722 Ethernet
controller resets all LEDs to normal operation.
• 1 = Force all LEDs into ON state.
• 0 = Normal LED operation.
0R/W
3 Force LEDs OFF When bit 3 of the PHY Extended Control Register is written to
1, the BCM5722 Ethernet controller forces all LEDs into the
OFF state. When bit 3 is written to 0, the BCM5722 Ethernet
controller resets all LEDs to normal operation.
• 1 = Force all LEDs into OFF state.
• 0 = Normal LED operation.
0R/W
2:1 Reserved – 01b RO
0 GMII FIFO Elasticity When bit 0 of the PHY Extended Control Register is written to
1, the BCM5722 Ethernet controller sets the GMII Fifo Elasticity
to high latency. In this mode the BCM5722 Ethernet controller
can transmit packets up to 9 KB in length. When this bit is
written to 0, the GMII Fifo Elasticity is set to low latency. In this
mode the BCM5722 Ethernet controller can transmit packets
up to 4.5-KB in length. Setting this bit to 1 adds 16 ns to the
1000BASE-T transmit latency.
• 1 = High latency.
• 0 = Low latency.
0R/W
Table 490: PHY Extended Control Register (PHY_Addr = 0x1, Reg_Addr = 10h) (Cont.)
Bit Field Description Init Access
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