BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page 445 Transceiver Registers Document 5722-PG101-R
7 Disable Partial
Response Filter
When bit 7 of the Auxiliary Control Register is written to 1, the
transmitter partial response filter is disabled. When the bit is
written to 0, the transmitter partial response filter is enabled.
• 1 = Transmitter partial response filter disabled.
• 0 = Transmitter partial response filter enabled.
0R/W
6 Reserved Write as 0, ignore on read. 0 R/W
5:4 Edge Rate Control
(100BASE-TX)
Bits 5 and 4 of the Auxiliary Control Register control the edge
rate of the 100BASE-TX transmit DAC output waveform:
• 00 = 4 ns.
• 01 = 5 ns.
• 10 = 3 ns.
• 11 = 0 ns.
00 R/W
3 Diagnostic Mode When bit 3 of the Auxiliary Control Register is written to 1, the
BCM5722 Ethernet controller enters a special mode to diagnose
faults within the cable plant. See Application Notes for details.
• 1 = Cable diagnostic mode enabled.
• 0 = Normal operation.
0R/W
2:0 Shadow Register
Select
The Auxiliary Control Register provides access to eight registers
using a shadow technique. These three bits written define which
set of 13 upper bits are used. No setup is required. Register
reads are determined by the previous write operation
.
•
000 = Normal Operation.
• 001 = 10 BASE-T Register
• 010 = Power Control Register
• 011 = Reserved.
• 100 = Misc Test Register 1
• 101 = Misc Test Register 2
• 110 = Reserved.
• 111 = Misc Control Register
000 R/W
Table 508: Auxiliary Control Register (PHY_Addr = 0x1, Reg_Addr = 18h, Shadow = 000, Normal) (Cont.)
Bit Field Description Init Access
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