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Cypress FM4 Series - Page 747

Cypress FM4 Series
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CHAPTER 13: CRC (Cyclic Redundancy Check)
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 747
Use Example 3 CRC32, Byte Order: Big Endian
Figure 2-4 Use Example 3 (CRC32, Byte Order: Big Endian)
//**********************************************
// CRC32 (IEEE-802.3)
// polynomial: 0x04C11DB7
// initial value: 0xFFFF_FFFF
// CRCCR.CRC32 1 // CRC32
// CRCCR.LTLEND: 0 // big endian
// CRCCR.LSBFST: 1 // LSB First
// CRCCR.CRCLTE: 0 // CRC big endian
// CRCCR.CRCLSF: 1 // CRC LSB First
// CRCCR.FXOR: 1 // CRC Final XOR on
//**********************************************
//
// Example 3-1 (CRC32)
//
// Initialization
B_WRITE (CRCCR, 0x6B);
// data write 0x313233343536373839
W_WRITE (CRCIN, 0x31323334);
W_WRITE (CRCIN, 0x35363738);
B_WRITE (CRCIN, 0x39);
// read result
W_READ (CRCR, data);
// check CRC result
assert (data == 0x2639F4CB); // <- big endian & LSB First
(Assumed as follows)
B_WRITE -- Byte writing
H_WRITE -- Half-word writing
W_WRITE -- Word writing
B_READ -- Byte reading
H_READ -- Half-word reading
W_READ -- Word reading
CRCCR -- CRC Control Register address
CRCINIT -- Initial Value Register address
CRCIN -- Input Data Register address
CRCR -- CRC Register address
CRC computing unit input sequence image
3
3
3
3
3
1
2
4
3
3
3
7
3
5
6
8
3
9
9
6
D
0
2
B
3
C
2
3
F
4
C
6
9
B
Head
Head
CRC result(in macro)
CRC output(FXOR & rearrange)
In CRC32 (IEEE-802.3) mode, the bit order is set to LSB First. This CRC computing unit supports
both the big endian and little endian as the byte order. Figure 2-4 shows an example for big endian.

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