Appendix A
A-2 MIPS R4000 Microprocessor User's Manual
A.1 Instruction Classes
CPU instructions are divided into the following classes:
• Load and Store instructions move data between memory and
general registers. They are all I-type instructions, since the
only addressing mode supported is base register + 16-bit
immediate offset.
• Computational instructions perform arithmetic, logical and
shift operations on values in registers. They occur in both
R-type (both operands are registers) and I-type (one operand is
a 16-bit immediate) formats.
• Jump and Branch instructions change the control flow of a
program. Jumps are always made to absolute 26-bit word
addresses (J-type format), or register addresses (R-type), for
returns and dispatches. Branches have 16-bit offsets relative to
the program counter (I-type). Jump and Link instructions save
their return address in register 31.
• Coprocessor instructions perform operations in the
coprocessors. Coprocessor loads and stores are I-type.
Coprocessor computational instructions have coprocessor-
dependent formats (see the FPU instructions in Appendix B).
Coprocessor zero (CP0) instructions manipulate the memory
management and exception handling facilities of the processor.
• Special instructions perform a variety of tasks, including
movement of data between special and general registers, trap,
and breakpoint. They are always R-type.
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