Mips Technologies R4000 - Page 58

Chapter 1
28 MIPS R4000 Microprocessor User's Manual
Figure 1-10 R4000 CP0 Registers
Index
Random
EntryLo0
EntryLo1
Context
PageMask
Wired
BadVAddr
Count
EntryHi
Compare
SR
Cause
EPC
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PRId 15
Config
LLAddr
WatchLo
WatchHi
ECC
CacheErr
TagLo
TagHi
ErrorEPC
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Register Name Reg. #Register Name Reg. #
Exception Processing Memory Management Reserved
XContext