Appendix A
A-112 MIPS R4000 Microprocessor User's Manual
Format:
MFHI rd
Description:
The contents of special register HI are loaded into general register rd.
To ensure proper operation in the event of interruptions, the two
instructions which follow a MFHI instruction may not be any of the
instructions which modify the HI register: MULT, MULTU, DIV, DIVU,
MTHI, DMULT, DMULTU, DDIV, DDIVU.
Operation:
Exceptions:
None
MFHI
0
Move From HI
31 2526 1516 0
rd
6105
65
6
SPECIAL MFHI0
5
11 10
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
MFHI
32, 64 T: GPR[rd] ← HI
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