MIPS R4000 Microprocessor User's Manual A-175
CPU Instruction Set Details
Format:
TLTIU rs, immediate
Description:
The 16-bit immediate is sign-extended and compared to the contents of
general register rs. Considering both quantities as signed integers, if the
contents of general register rs are less than the sign-extended immediate, a
trap exception occurs.
Operation:
Exceptions:
Trap exception
TLTIU
Trap If Less Than Immediate Unsigned
31 2526 2021 1516
REGIMM rs
655
immediateTLTIU
16
0
0 0 0 0 0 1 0 1 0 1 1
TLTIU
32 T: if (0 || GPR[rs]) < (0 || (immediate
15
)
16
|| immediate
15...0
) then
TrapException
endif
64 T: if (0 || GPR[rs]) < (0 || (immediate
15
)
48
|| immediate
15...0
) then
TrapException
endif
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