Mips Technologies R4000 - Page 662

Appendix B
B-12 MIPS R4000 Microprocessor User's Manual
StoreFPR(fpr, fmt, value)
if SR
26
= 1 then /* 64-bit wide FGRs */
case fmt of
S, W:
FGR[fpr] ← undefined
32
|| value
return
D, L:
FGR[fpr] ← value
return
endcase
elseif fpr
0
= 0 then /* valid specifier, 32-bit wide FGRs */
case fmt of
S, W:
FGR[fpr+1] ← undefined
FGR[fpr] ← value
return
D, L:
FGR[fpr+1] ← value
63...32
FGR[fpr] ← value
31...0
return
endcase
else /* undefined result for odd 32-bit reg #s */
undefined_result
endif