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NXP Semiconductors KL25 Series - Page 28

NXP Semiconductors KL25 Series
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Section number Title Page
37.4.11 Interrupts......................................................................................................................................................681
37.5 Initialization/Application Information..........................................................................................................................683
37.5.1 Initialization Sequence.................................................................................................................................683
37.5.2 Pseudo-Code Example.................................................................................................................................684
Chapter 38
Inter-Integrated Circuit (I2C)
38.1 Introduction...................................................................................................................................................................687
38.1.1 Features........................................................................................................................................................687
38.1.2 Modes of operation......................................................................................................................................688
38.1.3 Block diagram..............................................................................................................................................688
38.2 I2C signal descriptions..................................................................................................................................................689
38.3 Memory map and register descriptions.........................................................................................................................689
38.3.1 I2C Address Register 1 (I2Cx_A1)..............................................................................................................690
38.3.2 I2C Frequency Divider register (I2Cx_F)....................................................................................................691
38.3.3 I2C Control Register 1 (I2Cx_C1)...............................................................................................................692
38.3.4 I2C Status register (I2Cx_S)........................................................................................................................694
38.3.5 I2C Data I/O register (I2Cx_D)...................................................................................................................695
38.3.6 I2C Control Register 2 (I2Cx_C2)...............................................................................................................696
38.3.7 I2C Programmable Input Glitch Filter register (I2Cx_FLT).......................................................................697
38.3.8 I2C Range Address register (I2Cx_RA)......................................................................................................698
38.3.9 I2C SMBus Control and Status register (I2Cx_SMB).................................................................................699
38.3.10 I2C Address Register 2 (I2Cx_A2)..............................................................................................................701
38.3.11 I2C SCL Low Timeout Register High (I2Cx_SLTH)..................................................................................701
38.3.12 I2C SCL Low Timeout Register Low (I2Cx_SLTL)...................................................................................701
38.4 Functional description...................................................................................................................................................702
38.4.1 I2C protocol.................................................................................................................................................702
38.4.2 10-bit address...............................................................................................................................................707
38.4.3 Address matching.........................................................................................................................................709
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
28 Freescale Semiconductor, Inc.

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