NXP Semiconductors KL25 Series - Page 64

DMA Request
Multiplexer
DMA controller
Requests
Module
Module
Module
Peripheral
bridge 0
Register
access
Channel
request
Figure 3-11. DMA request multiplexer configuration
Table 3-19. Reference links to related information
Topic Related module Reference
Full description DMA request
multiplexer
DMA Mux
System memory map System memory map
Clocking Clock distribution
Power management Power management
Channel request DMA controller DMA Controller
Requests DMA request sources
3.4.8.1 DMA MUX Request Sources
This device includes a DMA request mux that allows up to 63 DMA request signals to be
mapped to any of the 4 DMA channels. Because of the mux there is no hard correlation
between any of the DMA request sources and a specific DMA channel. Some of the
modules support Asynchronous DMA operation as indicated by the last column in the
following DMA source assignment table.
Table 3-20. DMA request sources - MUX 0
Source
number
Source module Source description Async DMA
capable
0 — Channel disabled
1
1 Reserved Not used
2 UART0 Receive Yes
3 UART0 Transmit Yes
4 UART1 Receive
5 UART1 Transmit
6 UART2 Receive
7 UART2 Transmit
Table continues on the next page...
System Modules
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
64 Freescale Semiconductor, Inc.