BCM5722 Programmer’s Guide
10/15/07
Command Register (Offset 0x04)........................................................................................................190
Status Register (Offset 0x06) ..............................................................................................................191
Revision ID Register (Offset 0x08)......................................................................................................191
Class Code Register (Offset 0x09)......................................................................................................192
Cache Line Size Register (Offset 0x0C)..............................................................................................192
Latency Timer Register (Offset 0x0D).................................................................................................192
Header Type Register (Offset 0x0E) ...................................................................................................192
BIST Register (Offset 0x0F) ................................................................................................................193
Base Address Register 1/2 (Offset 0x10–0x17)..................................................................................193
Base Address Register 3–6 (Offset 0x18–0x27).................................................................................194
Subsystem Vendor ID Register (Offset 0x2C).....................................................................................194
Subsystem ID Register (Offset 0x2E)..................................................................................................194
Expansion ROM Base Address Register (Offset 0x30).......................................................................195
Capabilities Pointer Register (Offset 0x34) .........................................................................................195
Interrupt Line Register (Offset 0x3C)...................................................................................................195
Interrupt Pin Register (Offset 0x3D) ....................................................................................................195
Minimum Grant Register (Offset 0x3E) ...............................................................................................196
Maximum Latency Register (Offset 0x3F)...........................................................................................196
PCI Power Management Capabilities......................................................................................................197
Power Management Capability ID Register (Offset 0x48)...................................................................197
PM Next Capabilities Pointer Register (Offset 0x49)...........................................................................197
Power Management Capabilities Register (Offset 0x4A)....................................................................197
Power Management Control/Status Register (Offset 0x4C)................................................................198
PMCSR-BSE Register (Offset 0x4E)...................................................................................................198
Power Management Data Register (Offset 0x4F) ...............................................................................199
Vital Product Data Capabilities................................................................................................................200
VPD Capability ID Register (Offset 0x50)............................................................................................200
VPD Next Capabilities Pointer Register (Offset 0x51).........................................................................200
VPD Flag and Address Register (Offset 0x52)....................................................................................200
VPD Data Register (Offset 0x54) ........................................................................................................201
Broadcom Vendor-Specific Capabilities ................................................................................................202
Vendor-Specific Capability ID Register (Offset 0x58)..........................................................................202
Vendor-Specific Next Capabilities Pointer Register (Offset 0x59).......................................................202
Reset Counters Register (Offset 0x5C)...............................................................................................202
Device Serial No Lower DW Override Register (Offset: 0x60)............................................................203
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