Broadcom BCM5722 - Page 37

Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Page xxxvii
Figure 34: Transmit Data Flow.......................................................................................................................... 80
Figure 35: Basic Driver Flow to Send a Packet ................................................................................................ 81
Figure 36: Firmware Image Moved to Scratch Pad/RXMBUF .......................................................................... 93
Figure 37: Local Contexts............................................................................................................................... 108
Figure 38: Header Type Register 0xE ............................................................................................................ 109
Figure 39: Header Region Registers .............................................................................................................. 110
Figure 40: Device-Specific Registers.............................................................................................................. 112
Figure 41: Register Indirect Access................................................................................................................ 114
Figure 42: Indirect Memory Access ................................................................................................................ 116
Figure 43: Low-Priority Mailbox Access for Indirect Mode.............................................................................. 118
Figure 44: Standard Memory Mapped I/O Mode ............................................................................................ 119
Figure 45: Memory Window Base Address Register ...................................................................................... 120
Figure 46: Standard Mode Memory Window .................................................................................................. 121
Figure 47: Flat Mode Memory Map................................................................................................................. 123
Figure 48: Flat Mode Memory Map................................................................................................................. 127
Figure 49: Techniques for Accessing BCM5722 Ethernet Controller Local Memory...................................... 128
Figure 50: PCI Command Register................................................................................................................. 129
Figure 51: PCI Base Address Register........................................................................................................... 130
Figure 52: PCI Base Address Register Bits Read in Standard Mode............................................................. 130
Figure 53: PCI Base Address Register Bits Read in Flat Mode......................................................................131
Figure 54: Read and Write Channels of DMA Engine .................................................................................... 133
Figure 55: Power State Transition Diagram.................................................................................................... 137
Figure 56: Default Translation (No Swapping) on 64-Bit PCI ......................................................................... 144
Figure 57: Default Translation (No Swapping) on 32-bit PCI.......................................................................... 144
Figure 58: Word Swap Enable Translation on 32-Bit PCI (No Byte Swap)..................................................... 145
Figure 59: Byte Swap Enable Translation on 32-Bit PCI (No Word Swap)..................................................... 145
Figure 60: Byte and Word Swap Enable Translation on 32-Bit PCI................................................................ 145
Figure 61: WOL Functional Block Diagram..................................................................................................... 159
Figure 62: Comparing Ethernet Frames Against Available Patterns (10/100 Ethernet WOL) ........................ 162
Figure 63: Unused Rows and Rules Must Be Initialized with Zeros ............................................................... 163
Figure 64: Traditional Interrupt Scheme ......................................................................................................... 179
Figure 65: Message-Signaled Interrupt Scheme ............................................................................................ 180
Figure 66: MSI Data FIeld............................................................................................................................... 181
Figure 67: Basic Driver Interrupt Service Routine Flow.................................................................................. 183
Figure 68: File Transfer Scenario: FTP Session Begins................................................................................. 514