Broadcom BCM5722 - Page 38

BCM5722 Programmer’s Guide
10/15/07
Broadcom Corporation
Page xxxviii Document 5722-PG101-R
Figure 69: File Transfer Scenario: Speed Mismatch.......................................................................................514
Figure 70: File Transfer Scenario: Speed Buffers Run Low............................................................................515
Figure 71: File Transfer Scenario: Switch Backpressure ................................................................................516
Figure 72: File Transfer Scenario: Switch Flow Control..................................................................................516
Figure 73: File Transfer Scenario: File Transfer Complete .............................................................................517
Figure 74: Pause Control Frame.....................................................................................................................517
Figure 75: APM Architecture ...........................................................................................................................519
Figure 76: States for Power Consumption Management ................................................................................520
Figure 77: Advanced Configuration and Power Interface (ACPI) Components ..............................................523
Figure 78: OS Power Management (OSPM) Global States ............................................................................524
Figure 79: ACPI Sleep States .........................................................................................................................525
Figure 80: Power Management Configuration During POST ..........................................................................528
Figure 81: General Purpose Event Block ........................................................................................................529
Figure 82: PCI-Specified Reset Interval..........................................................................................................530
Figure 83: GPIO Hold Condition......................................................................................................................531