MIPS R4000 Microprocessor User's Manual A-15
CPU Instruction Set Details
Format:
AND rd, rs, rt
Description:
The contents of general register rs are combined with the contents of
general register rt in a bit-wise logical AND operation. The result is placed
into general register rd.
Operation:
Exceptions:
None
AND
And
31 2526 2021 1516
SPECIAL rs rt
655
rd 0 AND
55 6
11 10 6 5 0
0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0
AND
32 T: GPR[rd] ← GPR[rs] and GPR[rt]
64 T: GPR[rd] ← GPR[rs] and GPR[rt]
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