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Mips Technologies R4000 - Page 484

Mips Technologies R4000
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Appendix A
A-16 MIPS R4000 Microprocessor User's Manual
Format:
ANDI rt, rs, immediate
Description:
The 16-bit immediate is zero-extended and combined with the contents of
general register rs in a bit-wise logical AND operation. The result is placed
into general register rt.
Operation:
Exceptions:
None
ANDI
And Immediate
31 2526 2021 1516 0
ANDI rs rt
immediate
655 16
0 0 1 1 0 0
ANDI
32 T: GPR[rt] 0
16
|| (immediate and GPR[rs]
15...0
)
64 T: GPR[rt] 0
48
|| (immediate and GPR[rs]
15...0
)

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