Appendix A
A-86 MIPS R4000 Microprocessor User's Manual
Format:
LDL rt, offset(base)
Description:
This instruction can be used in combination with the LDR instruction to
load a register with eight consecutive bytes from memory, when the bytes
cross a doubleword boundary. LDL loads the left portion of the register
with the appropriate part of the high-order doubleword; LDR loads the
right portion of the register with the appropriate part of the low-order
doubleword.
The LDL instruction adds its sign-extended 16-bit offset to the contents of
general register base to form a virtual address which can specify an
arbitrary byte. It reads bytes only from the doubleword in memory which
contains the specified starting byte. From one to eight bytes will be
loaded, depending on the starting byte specified.
Conceptually, it starts at the specified byte in memory and loads that byte
into the high-order (left-most) byte of the register; then it loads bytes from
memory into the register until it reaches the low-order byte of the
doubleword in memory. The least-significant (right-most) byte(s) of the
register will not be changed.
LDL
Load Doubleword Left
31 2526 2021 1516 0
LDL base rt
offset
655 16
0 1 1 0 1 0
LDL
address 0
address 8
memory
register
LDL $24,3($0)
$24
(big-endian)
before
after
10
234567
98
10 11 12 13 14 15
ABCDEFGH
$24
34567FGH
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