Mips Technologies R4000 - Page 556

Appendix A
A-88 MIPS R4000 Microprocessor User's Manual
Given a doubleword in a register and a doubleword in memory, the
operation of LDL is as follows:
LEM Little-endian memory (BigEndianMem = 0)
BEM BigEndianMem = 1
Type AccessType (see Table 2-1) sent to memory
Offset pAddr
2...0
sent to memory
Exceptions:
TLB refill exception
TLB invalid exception
Bus error exception
Address error exception
Reserved instruction exception (R4000 in 32-bit mode)
(continued)
LDL
Load Doubleword Left
LDL
LDL
ACDB
Register
IKLJ
Memory
EGHF
MOPN
0PBCDEFGH007IJKLMNOP700
1OPCDEFGH106JKLMNOPH601
2NOPDEFGH205KLMNOPGH502
3MNOPEFGP304LMNOPFGH403
4LMNOPFGH403MNOPEFGH304
5KLMNOPGH502NOPDEFGH205
6JKLMNOPH601OPCDEFGH106
7IJKLMNOP700PBCDEFGH007
BigEndianCPU = 0
vAddr
2..0
destination
destination
type
type
offset
offset
BigEndianCPU = 1
LEM BEM
LEM BEM