Appendix A
A-116 MIPS R4000 Microprocessor User's Manual
Format:
MTHI rs
Description:
The contents of general register rs are loaded into special register HI.
If a MTHI operation is executed following a MULT, MULTU, DIV, or
DIVU instruction, but before any MFLO, MFHI, MTLO, or MTHI
instructions, the contents of special register LO are undefined.
Operation:
Exceptions:
None
rs
MTHI
Move To HI
21 2031 2526
SPECIAL
6
0
MTHI0
6 5
515 6
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1
MTHI
32,64 T–2: HI ← undefined
T–1: HI ← undefined
T: HI ← GPR[rs]
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