Mips Technologies R4000 - Page 622

Appendix A
A-154 MIPS R4000 Microprocessor User's Manual
Exceptions:
TLB refill exception
TLB invalid exception
TLB modification exception
Bus error exception
Address error exception
Coprocessor unusable exception
Opcode Bit Encoding:
SWCz
Store Word From Coprocessor
SWCz
(Continued)
SWCz
110011
31 30 29 28 27 26
Bit #
0
SWC1
110101
31 30 29 28 27 26
Bit #
0
SWC2
Coprocessor Unit NumberSW opcode