Broadcom BCM5722 - Page 30

BCM5722 Programmer’s Guide
10/15/07
SerDes LED Mode .......................................................................................................................475
SerDes Auto Power Down mode..................................................................................................476
Power Down Inactive Interface.....................................................................................................476
Autodetect Media Default.............................................................................................................476
Autodetect Media Priority .............................................................................................................476
Autodetect Media Enable .............................................................................................................476
Mode Control (PHY_Addr = 0x1, Reg_Addr = 1Ch, Shadow 11111b)................................................477
Write Enable.................................................................................................................................477
Shadow Register Selector............................................................................................................477
Mode Select Change....................................................................................................................477
Copper link ...................................................................................................................................477
SerDes link...................................................................................................................................478
Copper Energy Detect..................................................................................................................478
Signal Detect (SerDes Mode).......................................................................................................478
Mode Select .................................................................................................................................478
Enable 1000BASE-X Registers....................................................................................................478
HCD Status Register (PHY_Addr = 0x1, Reg_Addr = 1Dh, Bit 15 = 1)...............................................479
Master/Slave Seed Register (PHY_Addr = 0x1, Reg_Addr = 1Dh, Bit 15 = 0) ...................................480
PHY Test Register 1 (PHY_Addr = 0X1, REG_Addr = 1EH) ..............................................................480
Transceiver Registers (BCM5906/BCM5906M) ......................................................................................481
MII Management Interface Register Programming..............................................................................481
MII Register Map Summary.................................................................................................................482
MII Register Detailed Description........................................................................................................484
MII Control Register .....................................................................................................................484
Soft Reset.............................................................................................................................484
Loopback..............................................................................................................................484
Forced Speed Selection .......................................................................................................484
Auto-Negotiation Enable ......................................................................................................485
Power Down.........................................................................................................................485
Isolate...................................................................................................................................485
Restart Auto-Negotiation ......................................................................................................485
Duplex Mode ........................................................................................................................485
MII Status Register.......................................................................................................................486
100BASE-T4 Capability........................................................................................................486
100BASE-TX FDX Capability...............................................................................................486