Programmer’s Guide BCM5722
10/15/07
Broadcom Corporation
Document 5722-PG101-R Initialization Page 90
74. Download firmware (optional). See “Firmware Download” on page 92.
75. Replenish the Receive BD Producer Ring with the Receive BDs
76. Enable the transmit MAC. Set the Enable bit in the Transmit MAC Mode register (see “Transmit MAC Mode Register
(Offset 0x45C)” on page 253). Optionally, software may set the Enable_Flow_Control to enable IEEE 802.3x flow control.
77. Enable the receive MAC. Set the Enable bit in the Receive MAC Mode register (see “Receive MAC Mode Register (Offset
0x468)” on page 254). Optionally, software may set the following bits:
• Enable_Flow_Control—enable IEEE 802.3x flow control
• Accept_oversized—ignore RX MTU up to 64K maximum size
• Promiscuous_Mode—accept all packets regardless of dest address
• No_CRC_Check—RX MAC will not check Ethernet CRC
78. Disable auto-polling on the management interface (optional) by writing 0xC0000 to the MI Mode register (see “MI Mode
Register (Offset 0x454)” on page 252).
79. Configure D0 power state in PMSCR. See “Power Management Control/Status Register (Offset 0x4C)” on page 198.
Optional—the PMCSR register is reset to 0x00 after chip reset. Software may optionally reconfigure this register if the
device is being moved from D3 hot/cold.
80. Program Hardware to control LEDs. Write 0x00 to LED Controls register. LEDs on the BCM5722 Ethernet controller
reference designs are tied to the physical layer.
81. Activate link and enable MAC functional blocks. Set the Link_Status bit in the MI Status register (see “MI Status Register
(Offset 0x450)” on page 251) to generate a link attention.
82. Setup the physical layer and restart auto-negotiation. For details on PHY auto-negotiation, refer to the PHY data sheet.
(The PHY core used in each MAC is listed in Table 3 on page 8.). See “PHY Setup and Initialization” on page 157 for
information on setting up and initializing the PHY.
83. Setup multicast filters. See “Packet Filtering” on page 97 for details on multicast filter setup.
84. Enable interrupts. Clear the Mask_PCI_Interrupt_Output bit in the Miscellaneous Host Control register (see
“Miscellaneous Host Control Register (Offset 0x68)” on page 204).
Note: Broadcom recommends using PHY interrupts for link status change indications. Auto-polling is
another mechanism for determining link status change (see “PHY Setup and Initialization” on page 157).
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