Parallel ports UM0404
134/564 DocID13284 Rev 2
6 Parallel ports
6.1 Introduction
The ST10F276 has up to 111 parallel I/O lines, organized into:
• Eight 8-bit I/O ports (PORT0 made of P0H and P0L, PORT1 made of P1H and P1L,
Port4, Port6, Port7, Port8),
• One 15-bit I/O port (Port3),
• One 16-bit input port (Port5),
• One 16-bit I/O port (Port2).
These port lines may be used for general purpose Input/Output, controlled via software, or
may be used implicitly by ST10F276’s integrated peripherals or the External Bus Controller.
All port lines are bit addressable, and all input/output lines are individually (bit wise)
programmable as inputs or outputs via direction registers (except Port5). The I/O ports are
true bidirectional ports which are switched to high impedance state when configured as
inputs.
The output drivers of six I/O ports (2, 3, partially 4, 6, 7, 8) can be configured (pin by pin) for
push-pull operation or open-drain operation via control registers. The logic level of a pin is
clocked into the input latch once per CPU clock cycle, regardless whether the port is
configured for input or output.
A write operation to a port pin configured as an input, causes the value to be written into the
port output latch, while a read operation returns the latched state of the pin itself. A read-
modify-write operation reads the value of the pin, modifies it, and writes it back to the output
latch.
Writing to a pin configured as an output (DPx.y=‘1’) causes the output latch and the pin to
have the written value, since the output buffer is enabled. Reading this pin returns the value
of the output latch. A read-modify-write operation reads the value of the output latch,
modifies it, and writes it back to the output latch, thus also modifying the level at the pin.
Note: A set of registers mapped on XBUS is implemented on ST10F276 to manage the data,
direction and open-drain mode for those pins where the new X-Peripherals (XPWM, XASC
and XSSC) are mapped: the standard Port register bits for these pins are working when the
X-Peripherals are not enabled (see XPERCON register); vice versa, when the X-Peripherals
are enabled, the new registers take the control of the pins, and the standard registers
content is ignored.
6.1.1 Open drain mode
Some of I/O Ports of ST10F276 provide Open Drain Control. It is used to switch the output
driver of a port pin from a push-pull configuration to an open drain configuration. In push-pull
mode a port output driver has an upper and a lower transistor, thus it can actively drive the
line either to a high or a low level. In open drain mode the upper transistor is always
switched off, and the output driver can only actively drive the line to a low level. When
writing a ‘1’ to the port latch, the lower transistor is switched off and the output enters a high-
impedance state.
The high level must then be provided by an external pull-up device. With this feature, it is
possible to connect several port pins together to a AND-wired configuration, saving external
glue logic and/or additional software overhead for enabling/disabling output signals.
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