High-speed synchronous serial interface UM0404
270/564 DocID13284 Rev 2
12 High-speed synchronous serial interface
The high-speed synchronous serial interface SSC provides flexible high-speed serial
communication between the ST10F276 and other microcontrollers, microprocessors or
external peripherals.
The SSC supports full-duplex and half-duplex synchronous communication. The serial clock
signal can be generated by the SSC itself (master mode) or be received from an external
master (slave mode). Data width, shift direction, clock polarity and phase are
programmable. This allows communication with SPI-compatible devices. Transmission and
reception of data is double-buffered. A 16-bit Baud rate generator provides the SSC with a
separate serial clock signal.
The high-speed synchronous serial interface can be configured in three ways, it can be
used with other synchronous serial interfaces (the ASC0 in synchronous mode), or
configured in like master / slave or multi-master interconnections or operate like the popular
SPI interface. It can communicate with shift registers (I/O expansion), peripherals (such as
EEPROMs) or other controllers (networking). The SSC supports half-duplex and full-duplex
communication. Data is transmitted or received on pins MTSR/P3.9 (Master Transmit /
Slave Receive) and MRST/P3.8 (Master Receive / Slave Transmit). The clock signal is
output or input on pin SCLK/P3.13. These pins are alternate functions of Port3 pins.
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