ST ST10F276E - Mode 1: Symmetrical PWM Generation (Center Aligned PWM); Figure 153. Operation and Output Waveform in Mode 0

XBUS pulse width modulation module UM0404
360/564 DocID13284 Rev 2
The duty cycle of the PWM output signal is controlled by the value in the respective pulse
width shadow register. This mechanism allows the selection of duty cycles from 0% to 100%
including the boundaries.
For a value of 0000h the output will remain at a high level, representing a duty cycle of
100%. For a value higher than the value in the period register the output will remain at a low
level, which corresponds to a duty cycle of 0%.
The Figure 153 illustrates the operation and output waveforms of a XPWM channel in mode
0 for different values in the pulse width register. This mode is referred to as Edge Aligned
PWM, because the value in the pulse width shadow register only effects the positive edge of
the output signal. The negative edge is always fixed and related to the clearing of the timer.
Figure 153. Operation and output waveform in mode 0
18.1.2 Mode 1: symmetrical PWM generation (center aligned PWM)
Mode 1 is selected by setting the respective bit PMx in register XPWMCON1 to ‘1’. In this
mode the timer XPTx of the respective XPWM channel is counting up until it reaches the
value in the associated period shadow register. Upon the next count pulse the count
direction is reversed and the timer starts counting down now with subsequent count pulses
until it reaches the value 0000h. Upon the next count pulse the count direction is reversed
again and the count cycle is repeated with the following count pulses.
The PWM output signal is switched to a high level when the timer contents are equal to or
greater than the contents of the pulse width shadow register while the timer is counting up.
The signal is switched back to a low level when the respective timer has counted down to a
value below the contents of the pulse width shadow register. So in mode 1 this PWM value
controls both edges of the output signal.
Note that in mode 1 the period of the PWM signal is twice the period of the timer:
7
6
7
6
5
3
4
2
1
0
7
6
5
3
4
2
1
0
1
0
XPPx
Period=7
XPTx Count
Value
XPWx Pulse
Width=0
XPWx=1
XPWx=2
XPWx=4
XPWx=6
XPWx=7
XPWx=8
Latch Shadow Registers
Interrupt Request
LSR
LSR
Duty Cycle
100%
87.5%
75%
50%
25%
12.5%
0%
LSR