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UM0404 The central processing unit (CPU)
Whenever this register is updated via software, the Multiply/Divide Register In Use (MDRIU)
flag in the Multiply/Divide Control register (MDC) is set to '1'. The MDRIU flag is cleared,
whenever the MDL register is read via software. When a multiplication or division is
interrupted before its completion and when a new multiply or divide operation is to be
performed within the interrupt service routine, register MDL must be saved along with
registers MDH and MDC to avoid erroneous results.
A detailed description of how to use the MDL register for programming multiply and divide
algorithms can be found in Section 27: System programming on page 545.
3.4.15 The multiply / divide control register MDC
This bit-addressable 16-bit register is implicitly used by the CPU, when it performs a
multiplication or a division. It is used to store the required control information for the
corresponding multiply or divide operation. Register MDC is updated by hardware during
each single cycle of a multiply or divide instruction.
MDC (FF0Eh / 87h) SFR Reset Value: 0000h
When a division or multiplication was interrupted before its completion and the
multiply/divide unit is required, the MDC register must first be saved along with registers
MDH and MDL (to be able to restart the interrupted operation later), and then it must be
cleared, preparing it for the new calculation. After completion of the new division or
multiplication, the state of the interrupted multiply or divide operation must be restored. The
MDRIU flag is the only portion of the MDC register which might be of interest for the user.
The remaining portions of the MDC register are reserved for dedicated use by the hardware,
and should never be modified by the user in another way than described above. Otherwise,
a correct continuation of an interrupted multiply or divide operation cannot be guaranteed.
A detailed description of how to use the MDC register for programming multiply and divide
algorithms can be found in Section 27: System programming on page 545.
3.4.16 The constant zeros register ZEROS
All bits of this bit-addressable register are fixed to '0' by hardware. This register is read only.
Register ZEROS can be used as a register-addressable constant of all zeros, for bit
1514131211109876543210
--------MSMSMS
MDR
IU
MS MS MS MS
RW RW RW RW RW RW RW RW
Bit Function
MS
Internal Machine Status
The multiply/divide unit uses these bits to control internal operations.
Never modify these bits without saving and restoring register MDC.
MDRIU
Multiply/Divide Register In Use
‘0’: Cleared, when register MDL is read via software.
‘1’:Set when register MDL or MDH is written via software, or when a multiply or
divide instruction is executed.
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