ST ST10F276E - Protected Power down Mode; Interruptible Power down Mode

Power reduction modes UM0404
506/564 DocID13284 Rev 2
Note: Register SYSCON cannot be changed after execution of the EINIT instruction.
24.2.1 Protected power down mode
This mode is selected by clearing the bit PWDCFG in register SYSCON to ‘0’.
In this mode, the Power Down mode can only be entered if the NMI
(Non Maskable
Interrupt) pin is externally pulled low while the PWRDN instruction is executed.
This feature can be used in conjunction with an external power failure signal which pulls the
NMI
pin low when a power failure is imminent. The microcontroller will enter the NMI trap
routine which can save the internal state into RAM. After the internal state has been saved,
the trap routine may set a flag or write a certain bit pattern into specific RAM locations, and
then execute the PWRDN instruction. If the NMI
pin is still low at this time, Power Down
mode will be entered, otherwise program execution continues.
Exiting power down mode
In this mode, the only way to exit Power Down mode is with an external hardware reset.
The initialization routine (executed upon reset) can check the identification flag (see
WDTCON - Section 14: Watchdog timer on page 297) or bit pattern within RAM to
determine whether the controller was initially switched on, or whether it was properly
restarted from Power Down mode.
24.2.2 Interruptible power down mode
This mode is selected by setting the bit PWDCFG in register SYSCON to ‘1’.
In this mode, the Power Down mode can be entered if enabled Fast External Interrupt pins
(EXxIN pins, alternate functions of Port2 pins, with x = 7...0) are in their inactive level. This
inactive level is configured with the EXIxES bit field in the EXICON register, as follow:
EXICON (F1C0h / E0h) ESFR Reset Value: 0000h
Bit Function
PWDCFG
Power Down Mode Configuration Control
‘0’: Power Down Mode can only be entered during PWRDN instruction execution if
NMI
pin is low, otherwise the instruction has no effect. To exit Power Down Mode,
an external reset must be provided by asserting the RSTIN
pin.
‘1’: Power Down Mode can only be entered during PWRDN instruction execution if
all enabled Fast External Interrupt (EXxIN) pins are in their inactive level. Exiting
this mode can be done by asserting one enabled EXxIN pin and/or by an interrupt
coming from the Real Time Clock (if running), and/or by an interrupt coming from
CAN1/CAN2/I
2
C serial interfaces and/or by asserting RSTIN pin.
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EXI7ES EXI6ES EXI5ES EXI4ES EXI3ES EXI2ES EXI1ES EXI0ES
RW RW RW RW RW RW RW RW