EasyManua.ls Logo

ST ST10F276E - Figure 180. Data Transfer between Ifx Registers and Message RAM

ST ST10F276E
564 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
CAN modules UM0404
446/564 DocID13284 Rev 2
Figure 180. Data transfer between IFx registers and message RAM
After the partial write of a Message Object, the Message Buffer Registers that are not
selected in the Command Mask Register will be set to the actual contents of the selected
Message Object.
After the partial read of a Message Object, the Message Buffer Registers that are not
selected in the Command Mask Register will be left unchanged.
Transmission of messages
If the shift register of the CAN Core cell is ready for loading and if there is no data transfer
between the IFx Registers and Message RAM, the MsgVal bits in the Message Valid
Register and TxRqst bits in the Transmission Request Register are evaluated. The valid
Message Object with the highest priority pending transmission request is loaded into the
shift register by the Message Handler and the transmission is started. The Message
Object’s NewDat bit is reset.
After a successful transmission and if no new data was written to the Message Object
(NewDat = ‘0’) since the start of the transmission, the TxRqst bit will be reset. If TxIE is set,
IntPnd will be set after a successful transmission. If the C-CAN has lost the arbitration or if
an error occurred during the transmission, the message will be retransmitted as soon as the
CAN bus is free again. If meanwhile the transmission of a message with higher priority has
been requested, the messages will be transmitted in the order of their priority.
START
WR/RD = 1
Busy = 0
Busy = 1
Read Message Object to IFx
Write IFx to Message RAM
Read Message Object to IFx
No Yes
CAN_WAIT_B = 0
CAN_WAIT_B = 1
Write Command Request Register
No
Yes

Table of Contents

Related product manuals