ST ST10F276E - Table 77. Document Revision History

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Revision history
Table 77. Document revision history
Date Revision Changes
21-Feb-2003 0.1
It is the first official release of the document, just for ST internal
review only.
1-Sep-2003 0.2 Many modifications according to internal review procedure.
1-Oct-2003 0.3 Minor modifications according to internal review procedure.
7-Jan-2004 0.4
Table 58 on page 411 updated with correct registers address of
CAN2 module (EExxh instead of EFxxh).
Table 61 on page 429 updated adding BRP+BRPE extedend
prescaler option.
System clock tolerance range on page 457: title and content updated
to detail tolerance quations vs. PLL jitter effect.
Calculation of the bit timing parameters on page 461: examples of bit
timing calculation updated with PLL jitter effect.
Section 23.8: Reset application examples on page 492: examples of
bidirectional reset added.
Section 25.2.3: removed reference to oscillator frequency range (4 to
8MHz).