ST ST10F276E - Special Notes

Register set UM0404
542/564 DocID13284 Rev 2
26.9 Special notes
PEC pointer registers
The source and destination pointers for the peripheral event controller are mapped to a
special area within the IRAM. Pointers that are not occupied by the PEC may therefore be
used like normal RAM. During Power Down mode or any short reset the PEC pointers are
preserved.
The PEC and its registers are described in Section 5: Interrupt and trap functions on
page 96.
GPR access in the ESFR area
The locations 00’F000h...00’F01Eh within the ESFR area are reserved and provide access
to the current register bank via short register addressing modes. The GPRs are mirrored to
the ESFR area which allows access to the current register bank even after switching
register spaces (see example below).
MOVR5, DP3;GPR access via SFR area
EXTR#1
MOVR5, ODP3;GPR access via ESFR area
FCR1H 0x000E 0006 Flash Control Register 1 - High 0000h
FDR0L 0x000E 0008 Flash Data Register 0 - Low FFFFh
FDR0H 0x000E 000A Flash Data Register 0 - High FFFFh
FDR1L 0x000E 000C Flash Data Register 1 - Low FFFFh
FDR1H 0x000E 000E Flash Data Register 1 - High FFFFh
FARL 0x000E 0010 Flash Address Register Low 0000h
FARH 0x000E 0012 Flash Address Register High 0000h
FER 0x000E 0014 Flash Error Register 0000h
FNVWPXRL 0x000E DFB0 Flash Non Volatile Protection X Reg. Low FFFFh
FNVWPXRH 0x000E DFB2 Flash Non Volatile Protection X Reg. High FFFFh
FNVWPIRL 0x000E DFB4 Flash Non Volatile Protection I Reg. Low FFFFh
FNVWPIRH 0x000E DFB6 Flash Non Volatile Protection I Reg. High FFFFh
FNVAPR0 0x000E DFB8
Flash Non Volatile Access Protection Reg.
0
ACFFh
FNVAPR1L 0x000E DFBC
Flash Non Volatile Access Protection Reg.
1 - Low
FFFFh
FNVAPR1H 0x000E DFBE
Flash Non Volatile Access Protection Reg.
1 - High
FFFFh
XFICR 0x000E E000 XFlash Interface Control Register 000Fh
Table 75. Flash registers ordered by address (continued)
Name Physical address Description
Reset
value