ST ST10F276E - Hardware Aspects; Alternate Boot Mode (ABM); Activation; Memory Mapping

The bootstrap loader UM0404
320/564 DocID13284 Rev 2
is not in the bootstrap loader code), the settings can be modified. The following steps must
be performed in order to do this:
• disable the XPeripherals by clearing XPEN in SYSCON register. Attention: this part of
code must not be located in XRAM as it will be disabled.
• enabled the needed XPeripherals by writing the correct value in XPERCON register.
• set XPEN bit in SYSCON.
15.5.2 Hardware aspects
Although the new bootstrap loader has been designed to be compatible with the old
bootstrap loader, there are few hardware requirements with the new bootstrap loader
hereafter summarized.
15.6 Alternate boot mode (ABM)
15.6.1 Activation
Alternate boot is activated with the combination ‘01’ on Port0L[5..4] at the rising edge of
RSTIN
.
15.6.2 Memory mapping
ST10F276 has the same memory mapping for standard boot mode and for alternate boot
mode:
• Test-Flash: mapped from 00’0000h. The Standard Bootstrap Loader can be started by
executing a jump to the address of this routine (JMPS 00’xxxx; address to be defined).
• User Flash: the User Flash is divided in two parts: the IFLASH, visible only for memory
reads and memory writes (no code fetch) and the XFLASH, visible for any ST10
access (memory read, memory write, code fetch).
• All ST10F276 XRAM and Xperipherals modules can be accessed if enabled in
XPERCON register.
Note: The alternate boot mode can be used to reprogram the whole content of ST10F276 User
Flash (except Block 0 in Bank 2, where the alternate boot is mapped into).
15.6.3 Interrupts
ST10 interrupt vector table is always mapped from address 00’0000h.
As a consequence, interrupts are not allowed in Alternate Boot Mode; all maskable and non
maskable interrupts should be disabled.
Table 48. Hardware topics summary
Actual bootstrap loader New bootstrap loader Comments
P4.5 can be used as output in
BSL mode.
P4.5 cannot be used as user output
in BSL mode, but only as CAN1_RxD
or input or address-segments.
Level on CAN1_RxD can
change during boot step2.
Level on CAN1_RxD must be stable
at ‘1’ during boot step2.
External pull-up on P4.5
needed.