ST ST10F276E - Reset Circuitry; Figure 204. SW; WDT Bidirectional RESET (EA = 0) Followed by a HW RESET

System reset UM0404
490/564 DocID13284 Rev 2
Figure 204. SW / WDT bidirectional RESET (EA = 0) followed by a HW RESET
23.7 Reset circuitry
Internal reset circuitry is described in Figure 3 on page 30. The RSTIN pin provides an
internal pull-up resistor of 50kΩ to 250kΩ (The minimum reset time must be calculated
using the lowest value).
It also provides a programmable (BDRSTEN bit of SYSCON register) pull-down to output
internal reset state signal (synchronous reset, watchdog timer reset or software reset).
This bidirectional reset function is useful in applications where external devices require a
reset signal but cannot be connected to
RSTOUT pin.
This is the case of an external memory running codes before EINIT (end of initialization)
instruction is executed.
RSTOUT pin is pulled high only when EINIT is executed.
The RPD pin provides an internal weak pull-down resistor which discharges external
capacitor at a typical rate of 200μA. If bit PWDCFG of SYSCON register is set, an internal
pull-up resistor is activated at the end of the reset sequence. This pull-up will charge any
capacitor connected on RPD pin.
The simplest way to reset the ST10F276 is to insert a capacitor C1 between
RSTIN pin and
V
SS
, and a capacitor between RPD pin and V
SS
(C0) with a pull-up resistor R0 between
RPD pin and V
DD
. The input RSTIN provides an internal pull-up device equalling a resistor
of 50kΩ to 250kΩ (the minimum reset time must be determined by the lowest value). Select
P0[15:13] not transparent
RSTF
P0[12:8]
transparent
not t.
P0[1:0]
not t.
not transparent
RST
1024 TCL
RSTOUT
At this time RSTF is sampled LOW
so HW Reset is entered
(After Filter)
RSTIN
≤ 500 ns
≥ 50 ns
ALE
8 TCL
≤ 500 ns
≥ 50 ns
P0[7:2] not transparent