ST ST10F276E - Disable; Enable Control for Pin BHE (BYTDIS); Segment Address Generation; Figure 60. Switching from De-Multiplexed to Multiplexed Bus Mode

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UM0404 The external bus interface
Figure 60. Switching from de-multiplexed to multiplexed bus mode
Note: PORT1 gets available for general purpose I/O, when none of the BUSCON registers selects
a de-multiplexed bus mode.
8.2.5 Disable / enable control for pin BHE (BYTDIS)
Bit BYTDIS is provided for controlling the active low Byte High Enable (BHE) pin. The
function of the BHE
pin is enabled, if the BYTDIS bit contains a '0'. Otherwise, it is disabled
and the pin can be used as standard I/O pin. The BHE
pin is implicitly used by the External
Bus Controller to select one of two byte-organized memory chips, which are connected to
the ST10F276 via a word-wide external data bus. After reset the BHE
function is
automatically enabled (BYTDIS = '0'), if a 16-bit data bus is selected during reset, otherwise
it is disabled (BYTDIS = ‘1’). It may be disabled, if byte access to 16-bit memory is not
required, and the BHE
signal is not used.
8.2.6 Segment address generation
During external accesses the EBC generates a (programmable) number of address lines on
Port4, which extend the 16-bit address output on PORT0 or PORT1, and so increase the
Address
Address
Data
Data
De-multiplexed
Bus Cycle Idle State
Multiplexed
Bus Cycle
Address (P1)
Segment (P4)
ALE
BUS (P0)
RD
BUS (P0)
WR
Address Address
Data/Instr.
Data/Instr.
Bus Mode
Transfer Rate
(Speed factor for byte/word/Dword
access)
System Requirements
Free I/O
Lines
8-bit multiplexed Very low (1.5 / 3 / 6) Low (8-bit latch, byte bus) P1H, P1L
8-bit de-
multiplexed
Low (1 / 2 / 4)
Very low (no latch, byte
bus)
P0H
16-bit multiplexed High (1.5 / 1.5 / 3)
High (16-bit latch, word
bus)
P1H, P1L
16-bit de-
multiplexed
Very high (1 / 1 / 2) Low (no latch, word bus) ---