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ST ST10F276E - Interrupt Request Generation

ST ST10F276E
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DocID13284 Rev 2 367/564
UM0404 XBUS pulse width modulation module
XPWMCON1SET (EC0Ah) XBUS Reset Value: 0000h
XPWMCON1CLR (EC0Ch) XBUS Reset Value: 0000h
18.3 Interrupt request generation
Each of the four channels of the XPWM module can generate an individual interrupt
request. Each of these “channel interrupts” can activate the common “module interrupt”,
which actually interrupts the CPU.
Up to four interrupt control registers (XIRxSEL, x = 0, 1, 2, 3) are provided in order to select
the source of the XBUS interrupts: the XPWM common interrupt line, is linked to one of the
XPxINT registers (x = 0, 1, 2, 3). In particular, the XPWM interrupt line is available on the
XP2INT and XP3INT interrupt vectors.
Refer to Section 5.7: X-peripheral interrupt on page 117 for details.
The interrupt service routine can determine the active channel interrupt(s) from the channel
specific interrupt request flags PIRx in register XPWMCON0.
The interrupt request flag PIRx of a channel is set at the beginning of a new PWM cycle,
when loading the shadow registers. This indicates that registers XPPx and XPWx are now
ready to receive a new value. If a channel interrupt is enabled via its respective PIEx bit,
PB01
XPWM Channel 0/1 Burst Mode Control bit
‘0’: Channels 0 and 1 work independently in respective standard mode
‘1’: Outputs of channels 0 and 1 are ANDed to POUT0 in burst mode
PSx
XPWM Channel x Single Shot Mode Control bit
‘0’: Channel x works in respective standard mode
‘1’: Channel x operates in single shot mode
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SET.15 SET.14 - SET.12 - - - - SET.7 SET.6 SET.5 SET.4 SET.3 SET.2 SET.1 SET.0
WW W WWWWWWWW
Bit Function
SET.Y
XPWMCON1 Bit Y Set
Writing a ‘1’ will set the corresponding bit in XPWMCON1 register.
Writing a ‘0’ has no effect.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CLR.15 CLR.14 - CLR.12 - - - - CLR.7 CLR.6 CLR.5 CLR.4 CLR.3 CLR.2 CLR.1 CLR.0
WW W WWWWWWWW
Bit Function
CLR.Y
XPWMCON1 Bit Y Clear
Writing a ‘1’ will clear the corresponding bit in XPWMCON1 register.
Writing a ‘0’ has no effect.
Bit Function

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